Programmable, Asynchronous, Triangular Neighborhood Function for Self-Organizing Maps Realized on Transistor Level

Journal title

International Journal of Electronics and Telecommunications




vol. 56


No 4

Publication authors

Divisions of PAS

Nauki Techniczne


Polish Academy of Sciences Committee of Electronics and Telecommunications




ISSN 2081-8491 (until 2012) ; eISSN 2300-1933 (since 2013)


Osowski S. (2001), ECG beat recognition using fuzzy hybrid neural network, IEEE Transactions on Biomedical Engineering, 48, 11. ; Wismüller A. (2002), Cluster analysis of biomedical image time-series, International Journal of Computer Vision, 46, 2. ; Kohonen T. (2001), Self-Organizing Maps, ; Boniecki P. (2005), The kohonen neural network in classification problems solving in agricultural engineering, Journal of Research and Applications in Agricultural Engineering, 50, 1, 37. ; Mokriš I. (2004), Decreasing the feature space dimension by kohonen self-organizing maps, null. ; Li F. (2009), A compact current mode neuron circuit with gaussian taper learning capability, IEEE International Symposium on Circuits and Systems, 2129, ; Abuelma'ati M. (2006), A reconfigurable gaussian/ triangular basis function computation circuit, null, 232. ; Masmoudi D. (2002), A subtreshold mode programmable implementation of the gaussian function for rbf neural networks applications, null, 454. ; Długosz R. (2010), Programmable triangular neighborhood functions of kohonen self-organizing maps realized in CMOS technology, null, 529. ; Długosz R. (2008), CMOS, programmable, asynchronous neighborhood mechanism for wtm kohonen neural network, null, 197. ; Długosz R. (2010), Realization of a conscience mechanism in CMOS implementation of winner takes all neural networks, IEEE Transactions on Neural Networks, 21, 6, 961. ; Dubois P. (2009), Ad hoc wireless sensor networks for exploration of solar-system bodies, Acta Astronautica, 64, 5-6, 626. ; Długosz R. (2009), Optimization of the neighborhood mechanism for hardware implemented kohonen neural networks, null, 565. ; V. Peiris, "Mixed analog-digital VLSI implementation of a kohonen neural network," Ph.D. dissertation, Ph.D thesis, Ecole Polytechnique Fédérale de Lausanne (EPFL), 1994. ; Chang C. (2005), A review of 0.18m full adder performances for tree structured arithmetic circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 13, 6, 686.