TitleTracing Fault Effects in FPGA Systems
Journal titleInternational Journal of Electronics and Telecommunications
Divisions of PASNauki Techniczne
AbstractAbstract The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets - SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.
PublisherPolish Academy of Sciences Committee of Electronics and Telecommunications
IdentifierISSN 2081-8491 (until 2012) ; eISSN 2300-1933 (since 2013)