Details

Title

Low-Power High-Speed Double Gate 1-bit Full Adder Cell

Journal title

International Journal of Electronics and Telecommunications

Yearbook

2016

Numer

No 4

Publication authors

Keywords

Low-power full-adder, Low-power CMOS design,multiplexer based full-adder design, multi-threshold voltagebased Full-adder design, pass transmission logic

Divisions of PAS

Nauki Techniczne

Publisher

Polish Academy of Sciences Committee of Electronics and Telecommunications

Identifier

ISSN 2081-8491 (until 2012) ; eISSN 2300-1933 (since 2013)

DOI

10.1515/eletel-2016-0045

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