Details

Title

On Transformation of a Logical Circuit to a Circuit with NAND and NOR Gates Only

Journal title

International Journal of Electronics and Telecommunications

Yearbook

2018

Volume

vol. 64

Numer

No 3

Authors

Keywords

logic synthesis ; logic devices ; VLSI ; minimization

Divisions of PAS

Nauki Techniczne

Publisher

Polish Academy of Sciences Committee of Electronics and Telecommunications

Date

2018.08.23

Type

Artykuły / Articles

Identifier

ISSN 2081-8491 (until 2012) ; eISSN 2300-1933 (since 2013)

DOI

10.24425/123535

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