Tytuł artykułu

Power equalization of AES FPGA implementation

Tytuł czasopisma

Bulletin of the Polish Academy of Sciences: Technical Sciences




No 1 March

Autorzy publikacji

Wydział PAN

Nauki Techniczne


Polish Academy of Sciences




ISSN 0239-7528, eISSN 2300-1917


H. Bar-El, "Introduction to side channel attacks", in <i>White Paper</i>, Discretix Technologies Ltd, Israel, 1999. ; P. Kocher, J. Jaffe, and B. Jun, "Introduction to differential power analysis and related attacks", <i>Technical Report, Cryptography Research Inc.</i> 1 <a target="_blank" href=''></a> ; Kocher P. (1999), Differential power analysis, null, 388. ; Ors S. (2004), Power-analysis attack on an ASIC AES implementation, null, 1, 546. ; Pierson M. (2006), Low Cost Differential Power Analysis (DPA) Resistant Crypto-Chips. ; McDaniel L. (2003), An Investigation of Differential Power Analysis on FPGA-Based Encryption Systems. ; Fahn P. (1999), IPA: A new class of power attacks, null, 1717, 173. ; Gawinecki J. (2006), Safety analysis of implementation of equipment algorithms of information coding, National Symposium of Telecommunication and Telecomputing, 1. ; Tiri K. (2004), Synthesis of secure FPGA implementation, Int. Workshop on Logic and Synthesis, 1, 224. ; Akkar M. (2001), An implementation of DES and AES, secure against some attacks, Int. Workshop on Cryptographic Hardware and Embedded Systems, 2162, 309. ; Gomułkiewicz M. (2002), Hamming weight attacks on cryptographic hardware - breaking masking defense, null, 2502, 90. ; Benini L. (2003), Energy-aware design techniques for differential power analysis protection, null, 1, 36. ; Strachacki M. (2008), Implementation of AES algorithm resistant to differential power analysis, null, 1, 214. ; Daemen J. (1998), AES proposal: rijndael, null, 1.