The stability analysis for discrete-time fractional linear systems with delays is presented. The state-space model with a time shift in the difference is considered. Necessary and sufficient conditions for practical stability and for asymptotic stability have been established. The systems with only one matrix occurring in the state equation at a delayed moment have been also considered. In this case analytical conditions for asymptotic stability have been given. Moreover parametric descriptions of the boundary of practical stability and asymptotic stability regions have been presented.
The practical and asymptotic stabilities of delayed fractional discrete-time linear systems described by the model without a time shift in the difference are addressed. The D-decomposition approach is used for stability analysis. New necessary and sufficient stability conditions are established. The conditions in terms of the location of eigenvalues of the system matrix in the complex plane are given.
This paper presents the results of the theoretical and practical analysis of selected features of the function of conditional average value of the absolute value of delayed signal (CAAV). The results obtained with the CAAV method have been compared with the results obtained by method of cross correlation (CCF), which is often used at the measurements of random signal time delay. The paper is divided into five sections. The first is devoted to a short introduction to the subject of the paper. The model of measured stochastic signals is described in Section 2. The fundamentals of time delay estimation using CCF and CAAV are presented in Section 3. The standard deviations of both functions in their extreme points are evaluated and compared. The results of experimental investigations are discussed in Section 4. Computer simulations were used to evaluate the performance of the CAAV and CCF methods. The signal and the noise were Gaussian random variables, produced by a pseudorandom noise generator. The experimental standard deviations of both functions for the chosen signal to noise ratio (SNR) were obtained and compared. All simulation results were averaged for 1000 independent runs. It should be noted that the experimental results were close to the theoretical values. The conclusions and final remarks were included in Section 5. The authors conclude that the CAAV method described in this paper has less standard deviation in the extreme point than CCF and can be applied to time delay measurement of random signals.
This paper presents an enhanced internal model control (EIMC) scheme for a time-delayed second order unstable process, which is subjected to exogenous disturbance and model variations. Even though the conventional internal model control (IMC) can provide an asymptotic tracking response with desired stability margins, the major limitation of conventional IMC is that it cannot be applied for an unstable system because a small exogenous disturbance can trigger the control signal to grow unbounded. Hence, modify- ing the conventional IMC structure to guarantee the internal stability, we present an EIMC scheme which can offer better trade-off between setpoint tracking and disturbance rejec- tion characteristics. To improve the load disturbance rejection characteristics and attenuate the effect of sensor noise, we solve the selection of controller gains as an H¥ optimization problem. One of the key aspects of the EIMC scheme is that the robustness of the closed loop system can be tuned via a single tuning parameter. The performance of the EIMC scheme is experimentally assessed on a magnetic levitation plant for reference tracking application. Experimental results substantiate that the EIMC scheme can effectively coun- teract the inherent time delay in the model and offer precise tracking, even in the presence of exogenous disturbance. Moreover, by comparing the trajectory tracking performance of EIMC with that of the proportional integral velocity (PIV) controller through cumulative power spectral density (CPSD) of the tracking error, we show that the EIMC can offer better low frequency servo response with minimal vibrations.
The paper describes the construction, operation and test results of three most popular interpolators from a viewpoint of time-interval (TI) measurement systems consisting of many tapped-delay lines (TDLs) and registering pulses of a wide-range changeable intensity. The comparison criteria include the maximum intensity of registered time stamps (TSs), the dependency of interpolator characteristic on the registered TSs’ intensity, the need of using either two counters or a mutually-complementing pair counter-register for extending a measurement range, the need of calculating offsets between TDL inputs and the dependency of a resolution increase on the number of used TDL segments. This work also contains conclusions about a range of applications, usefulness and methods of employing each described TI interpolator. The presented experimental results bring new facts that can be used by the designers who implement precise time delays in the field-programmable gate arrays (FPGA).
Necessary and sufficient conditions for robust stability of the positive discrete-time interval system with time-delays are established. It is shown that this system is robustly stable if and only if one well de?ned positive discrete-time system with time-delays is asymptotically stable. The considerations are illustrated by numerical example.
Most systems used in quantum physics experiments require the efficient and simultaneous recording different multi-photon coincidence detection events. In such experiments, the single-photon gated counting systems can be applicable. The main sources of errors in these systems are both instability of the clock source and their imperfect synchronization with the excitation source. Below, we propose a solution for improvement of the metrological parameters of such measuring systems. Thus, we designed a novel integrated circuit dedicated to registration of signals from a photon number resolving detectors including a phase synchronizer module. This paper presents the architecture of a high-resolution (~60 ps) digital phase synchronizer module cooperating with a multi-channel coincidence counter. The main characteristic feature of the presented system is its ability to fast synchronization (requiring only one clock period) with the measuring process. Therefore, it is designed to work with various excitation sources of a very wide frequency range. Implementation of the phase synchronizer module in an FPGA device enabled to reduce the synchronization error value from 2.857 ns to 214.8 ps.
The designing process of high resolution time interval measurement systems creates many problems that need to be eliminated. The problems are: the latch error, the nonlinearity conversion, the different duty cycle coefficient of the clock signal, and the clock signal jitter. Factors listed above affect the result of measurement. The FPGA (Field Programmable Gate Array) structure also imposes some restrictions, especially when a tapped delay line is constructed. The article describes the high resolution time-to-digital converter, implemented in a FPGA structure, and the types of errors that appear there. The method of minimization and processing of data to reduce the influence of errors on the measurement is also described.