Search results

Filters

  • Journals
  • Date

Search results

Number of results: 5
items per page: 25 50 75
Sort by:

Abstract

This paper presents a novel strategy of fault classification for the analog circuit under test (CUT). The proposed classification strategy is implemented with the one-against-one Support Vector Machines Classifier (SVC), which is improved by employing a fault dictionary to accelerate the testing procedure. In our investigations, the support vectors and other relevant parameters are obtained by training the standard binary support vector machines. In addition, a technique of radial-basis-function (RBF) kernel parameter evaluation and selection is invented. This technique can find a good and proper kernel parameter for the SVC prior to the machine learning. Two typical analog circuits are demonstrated to validate the effectiveness of the proposed method.
Go to article

Abstract

A modification of the descriptor in a human detector using Histogram of Oriented Gradients (HOG) and Support Vector Machine (SVM) is presented. The proposed modification requires inserting the values of average cell brightness resulting in the increase of the descriptor length from 3780 to 3908 values, but it is easy to compute and instantly gives ≈ 25% improvement of the miss rate at 10‒4 False Positives Per Window (FPPW). The modification has been tested on two versions of HOG-based descriptors: the classic Dalal-Triggs and the modified one, where, instead of spatial Gaussian masks for blocks, an additional central cell has been used. The proposed modification is suitable for hardware implementations of HOG-based detectors, enabling an increase of the detection accuracy or resignation from the use of some hardware-unfriendly operations, such as a spatial Gaussian mask. The results of testing its influence on the brightness changes of test images are also presented. The descriptor may be used in sensor networks equipped with hardware acceleration of image processing to detect humans in the images.
Go to article

Abstract

Correct incipient identification of an analog circuit fault is conducive to the health of the analog circuit, yet very difficult. In this paper, a novel approach to analog circuit incipient fault identification is presented. Time responses are acquired by sampling outputs of the circuits under test, and then the responses are decomposed by the wavelet transform in order to generate energy features. Afterwards, lower-dimensional features are produced through the kernel entropy component analysis as samples for training and testing a one-against-one least squares support vector machine. Simulations of the incipient fault diagnosis for a Sallen-Key band-pass filter and a two-stage four-op-amp bi-quad low-pass filter demonstrate the diagnosing procedure of the proposed approach, and also reveal that the proposed approach has higher diagnosis accuracy than the referenced methods.
Go to article

Abstract

Considering the problem to diagnose incipient faults in nonlinear analog circuits, a novel approach based on fractional correlation is proposed and the application of the subband Volterra series is used in this paper. Firstly, the subband Volterra series is calculated from the input and output sequences of the circuit under test (CUT). Then the fractional correlation functions between the fault-free case and the incipient faulty cases of the CUT are derived. Using the feature vectors extracted from the fractional correlation functions, the hidden Markov model (HMM) is trained. Finally, the well-trained HMM is used to accomplish the incipient fault diagnosis. The simulations illustrate the proposed method and show its effectiveness in the incipient fault recognition capability.
Go to article

Abstract

Power electronic circuits (PECs) are prone to various failures, whose classification is of paramount importance. This paper presents a data-driven based fault diagnosis technique, which employs a support vector data description (SVDD) method to perform fault classification of PECs. In the presented method, fault signals (e.g. currents, voltages, etc.) are collected from accessible nodes of circuits, and then signal processing techniques (e.g. Fourier analysis, wavelet transform, etc.) are adopted to extract feature samples, which are subsequently used to perform offline machine learning. Finally, the SVDD classifier is used to implement fault classification task. However, in some cases, the conventional SVDD cannot achieve good classification performance, because this classifier may generate some so-called refusal areas (RAs), and in our design these RAs are resolved with the one-against-one support vector machine (SVM) classifier. The obtained experiment results from simulated and actual circuits demonstrate that the improved SVDD has a classification performance close to the conventional one-against-one SVM, and can be applied to fault classification of PECs in practice.
Go to article

This page uses 'cookies'. Learn more