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Abstract

In order to compare the pathogenicity of different Tembusu virus (TMUV) strains from geese, ducks and chickens, 56 5-day-old Cherry Valley ducklings which were divided into 7 groups and infected intramuscularly with 7´105 PFU/ml per duck of six challenge virus stocks. The clinical signs, weight gain, mortality, macroscopic and microscopic lesions, virus loads in sera of 1, 3, 5, 7, 11 and 14 dpi and serum antibody titers were examined. The results showed that these viruses could make the young ducks sick, but the clinical signs differed with the different species-original strains. All the experimental groups lose markedly in weight gain compared to the control, but there were no obvious distinctions in weight gains, as well as macroscopic and microscopic lesions of dead ducks between the infected groups. However, the groups of waterfowl-derived strains (from geese and ducks) showed more serious clinical signs and higher relative expressions of virus loads in sera than those from chicken-derived. The mortality of waterfowl groups was 37.5%, and the greatest mortality of chicken groups was 12.5%. The serum antibodies of the geese-species group JS804 appeared earlier and were higher in the titers than others. Taken toghter, the pathogenicity of waterfowl-derived TMUV was more serious than chicken-derived TMUV and JS804 could be chosen as one TMUV vaccine strain to protect from the infection.
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Authors and Affiliations

Y. Li
Q. Liu
T. Xu
X. Huang
X. Liu
K. Han
Y. Liu
J. Yang
D. Zhao
K. Bi
W. Sun
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Abstract

Due to increase in threats posed by offshore foundries, the companies outsourcing IPs are forced to protect their designs from the threats posed by the foundries. Few of the threats are IP piracy, counterfeiting and reverse engineering. To overcome these, logic encryption has been observed to be a leading countermeasure against the threats faced. It introduces extra gates in the design, known as key gates which hide the functionality of the design unless correct keys are fed to them. The scan tests are used by various designs to observe the fault coverage. These scan chains can become vulnerable to sidechannel attacks. The potential solution for protection of this vulnerability is obfuscation of the scan output of the scan chain. This involves shuffling the working of the cells in the scan chain when incorrect test key is fed. In this paper, we propose a method to overcome the threats posed to scan design as well as the logic circuit. The efficiency of the secured design is verified on ISCAS’89 circuits and the results prove the security of the proposed method against the threats posed.

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Authors and Affiliations

V.A. Deepak
M. Priyatharishini
M. Nirmala Devi

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