The progress of additive manufacturing technology brings about many new questions and challenges. Additive manufacturing technology allows for designing machine elements with smaller mass, but at the same time with the same stiffness and stress loading capacity. By using additive manufacturing it is possible to produce gears in the form of shell shape with infill inside. This study is carried out as an attempt to answer the question which type of infill, and with how much density, is optimal for a spur gear tooth to ensure the best stiffness and stress loading capacity. An analysis is performed using numerical finite element method. Two new infill structures are proposed: triangular infill with five different densities and topology infill designed according to the already known results for 2D cantilever topology optimization, known as Michell structures. The von Mises stress, displacements and bending stiffness are analyzed for full body gear tooth and for shell body gear tooth with above mentioned types of infill structure.

This paper describes the arithmetic blocks based on Montgomery Multiplier (MM), which reduces complexity, gives lower power dissipation and higher operating frequency. The main objective in designing these arithmetic blocks is to use modified full adder structure and carry save adder structure that can be implemented in algorithm based MM circuit. The conventional full adder design acts as a benchmark for comparison, the second is the modified Boolean equation for full adder and third design is the design of full adder consisting of two XOR gate and a 2-to-1 Multiplexer. Besides Universal gates such as NOR gate and NAND gate, full adder circuits are used to further improve the speed of the circuit. The MM circuit is evaluated based on different parameters such as operating frequency, power dissipation and area of occupancy in FPGA board. The schematic designs of the arithmetic components along with the MM architecture are constructed using Quartus II tool, while the simulation is done using Model sim for verification of circuit functionality which has shown improvement on the full adder design with two XOR gate and one 2-to-1 Multiplexer implementation in terms of power dissipation, operating frequency and area.