The paper presents a novel implementation of a time-to-digital converter (TDC) in field-programmable gate array (FPGA) devices. The design employs FPGA digital signal processing (DSP) blocks and gives more than two-fold improvement in mean resolution in comparison with the common conversion method (carry chain-based time coding line). Two TDCs are presented and tested depending on DSP configuration. The converters were implemented in a Kintex-7 FPGA device manufactured by Xilinx in 28 nm CMOS process. The tests performed show possibilities to obtain mean resolution of 4.2 ps but measurement precision is limited to at most 15 ps mainly due to high conversion nonlinearities. The presented solution saves FPGA programmable logic blocks and has an advantage of a wider operation range when compared with a carry chain-based time coding line.

Conventionally, the filtering technique for attitude estimation is performed using gyros or attitude dynamics

models. In order to extend the application range of an attitude filter, this paper proposes a quaternionbased

filtering framework for gyroless attitude estimation without an attitude dynamics model. The attitude

estimation system is established based on a quaternion kinematic equation and vector observation models.

The angular velocity in the system is determined through observation vectors from attitude sensors and the

statistical properties of the angular velocity error are analysed. A Kalman filter is applied to estimate the

attitude error such that the effect from the angular velocity error is compensated with its statistical properties

at each sampling moment. A numerical simulation example is presented to illustrate the performance of the

proposed algorithm.