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Abstract

A novel current-inversion type negative impedance converter (CNIC) is presented. It is built without the use of any resistors. Furthermore, a second-order low-pass filter based on this CNIC is also analysed. It shows a bandwidth of 50 MHz at 320 µW power consumption and 2 V supply voltage when realized in a 0.35 µm CMOS process.

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W. Jendernalik
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Abstract

In this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs) fabricated in complementary metal oxide semiconductor (CMOS) technologies. While discussing the vision chip realizations the importance of low-cost, low-power solutions is highlighted, which are increasingly being used in intelligent consumer equipment. Thanks to the great development of the automated design environments and fabrication methods, new, so far unknown applications of the vision chips become possible, as for example disposable endoscopy capsules for photographing the human gastrointestinal tract for the purposes of medical diagnosis.

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Authors and Affiliations

W. Jendernalik
G. Blakiewicz
A. Handkiewicz
M. Melosik
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Abstract

The article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 μm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image processing algorithms. The prototype with a resolution of 32 × 32 pixels allows the acquisition and processing of images at high speed, up to 2000 frames/s. Operation of the prototypes was verified in practice using the developed software and a measurement system based on a FPGA platform.

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Authors and Affiliations

Waldemar Jendernalik
Jacek Jakusz
Grzegorz Blakiewicz
Stanisław Szczepański
Robert Piotrowski
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Abstract

A new configuration of rectifier suiting CMOS technology is presented. The rectifier consists of only two n-channel MOS transistors, two capacitors and two resistors; for this reason it is very favourable in manufacturing in CMOS technology. With these features the rectifier is easy to design and cheap in production. Despite its simplicity, the rectifier has relatively good characteristics, the voltage and power efficiency, and bandwidth greater than 89%, 87%, and 1 GHz, respectively. The performed simulations and measurements of a prototype circuit fully confirmed its correct operation and advantages.

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Authors and Affiliations

Waldemar Jendernalik
Jacek Jakusz
Grzegorz Blakiewicz
Miron Kłosowski

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