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Number of results: 5
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Abstract

This paper presents the design of a compact protocol for fixed-latency, high-speed, reliable, serial transmission between simple field-programmable gate arrays (FPGA) devices. Implementation of the project aims to delineate word boundaries, provide randomness to the electromagnetic interference (EMI) generated by the electrical transitions, allow for clock recovery and maintain direct current (DC) balance. An orthogonal concatenated coding scheme is used for correcting transmission errors using modified Bose–Chaudhuri–Hocquenghem (BCH) code capable of correcting all single bit errors and most of the double-adjacent errors. As a result all burst errors of a length up to 31 bits, and some of the longer group errors, are corrected within 256 bits long packet. The efficiency of the proposed solution equals 46.48%, as 119 out of 256 bits are fully available to the user. The design has been implemented and tested on Xilinx Kintex UltraScale+ KCU116 Evaluation Kit with a data rate of 28.2 Gbps. Sample latency analysis has also been performed so that user could easily carry out calculations for different transmission speed. The main advancement of the work is the use of modified BCH(15, 11) code that leads to high error correction capabilities for burst errors and user friendly packet length.

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Authors and Affiliations

Michał Kruszewski
Wojciech Marek Zabołotny
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Abstract

A novel approach to a trigger mode in the Gas Electron Multiplier (GEM) detector readout system is presented. The system is already installed at WEST tokamak. The article briefly describes the architecture of the GEM detector and the measurement system. Currently the system can work in two trigger modes: Global Trigger and Local Trigger. All trigger processing blocks are parts of the Charge Signal Sequencer module which is responsible for transferring data to the PC. Therefore, the article presents structure of the Sequencer with details about basic blocks, theirs functionality and output data configuration. The Sequencer with the trigger algorithms is implemented in an FPGA chip from Xilinx. Global Trigger, which is a default mode for the system, is not efficient and has limitations due to storing much data without any information. Local trigger which is under tests, removes data redundancy and is constructed to send only valid data, but the rest of the software, especially on the PC side, is still under development. Therefore authors propose the trigger mode which combines functionality of two existing modes. The proposed trigger, called Zero Suppression Trigger, is compatible with the existing interfaces of the PC software, but is also capable to verify and filter incoming signals and transfer only recognized events. The results of the implementation and simulation are presented.
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Authors and Affiliations

Piotr Kolasinski
1
Krzysztof Pozniak
1
Andrzej Wojenski
1
Paweł Linczuk
2
Rafał Krawczyk
1 3
Michał Gaska
1
Wojciech Zabolotny
1
Grzegorz Kasprowicz
1
Maryna Chernyshova
4
Tomasz Czarski
4

  1. Institute of Electronic Systems, Faculty of Electronics and Information Technology, University of Technology, Warsaw, Poland
  2. Institute of Electronic Systems, Faculty of Electronics and Information Technology, University of Technology, Warsaw, Poland
  3. CERN, Geneva, Switzerland
  4. Institute of Plasma Physics and Laser Microfusion, Warsaw, Poland
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Abstract

The paper presents improvements of the developed system for hot plasma radiation measurement in the soft Xray range based on a Gas Electron Multiplier (GEM) detector. Scope of work consists of a new solution for handling hardware time-synchronization with tokamak systems needed for better synchronization with other diagnostics and measurement quality. The paper describes the support of new modes of triggering on PC-side. There are communication and data path overview in the system. The new API is described, which provide separate channels for data and control and is more robust than the earlier solution. Work concentrates on stability and usability improvements of the implemented device providing better usage for end-user.
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Authors and Affiliations

Paweł Linczuk
1
Andrzej Wojenski
2
Piotr Kolasinski
2
Rafał Krawczyk
2 3
Wojciech Zabolotny
2
Krzysztof Pozniak
2
Maryna Chernyshova
4
Tomasz Czarski
4
Michał Gaska
2
Grzegorz Kasprowicz
2
Karol Malinowski
4

  1. Institute of Electronic Systems, Faculty of Electronics and Information Technology, University of Technology, Warsaw, Poland
  2. Institute of Electronic Systems, Faculty of Electronics and Information Technology, University of Technology, Warsaw, Poland
  3. CERN, Geneva, Switzerland
  4. Institute of Plasma Physics and Laser Microfusion, Warsaw, Poland

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