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Abstract

The paper deals with hardware solution of a fully digital dead-time generator. The circuit is applicable to the H-bridges based on any type of semiconductor switching devices including SiC, IGBT, Si-MOSFET and up-to-date GaN HEMTs. The generation of dead-times is ensured by commercially available silicon delay lines. High temperature stability is obtained by self-compensation of propagation delay of logic elements thanks to the symmetry of design topology. The circuit can be set-up to generate dead-times in the range from 10 ns to 500 ns. Longer dead-times are also available by simple cascading of the silicon delay lines. The key motivation for development of the circuit was unavailability of ready to use integrated solutions on the market. Moreover, contrary to the other solutions the proposed circuit is immune to prospective oscillations of an input PWM signal. The paper brings a detailed analysis of the circuit principle, results of the verification of a sample solution and an example of practical application as well.

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Authors and Affiliations

Jiri Svarny
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Abstract

This paper presents an analysis and simulation studies of three-phase matrix converter with GaN HEMT bidirectional switches with predictive control of grid currents and converter output currents. Two methods of grid currents shaping are described and compared. The first method is based on calculations of instantaneous grid reactive power and the second one uses the active power of the load. The analyzed converter works with the resistive-inductive load, and from the grid side the LC filter with damping resistor has been used.

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Authors and Affiliations

K. Nowaszewski
A. Sikorski

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