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Abstract

Objectives: To design and simulate a buck converter and detector circuit which can prognostically indicate the power supply failure. Failure of Aluminium Electrolytic Capacitor (AEC) is considered as the parameter causing the power supply failure. To analyse variation of output ripple voltage due to possible changes in the Equivalent Series Resistance (ESR) and effective capacitance of the capacitor and design a detector to detect the failure of power supply prognostically.
Methods: A DC-DC buck converter in SMPS topology is designed by assuming an input voltage of 12V with 3 volts possible fluctuations and an output voltage of 3.3 volts is desired. Simulation is carried out to measure the variation in output ripple voltage caused due to aging of electrolytic capacitor using TINA by Texas Instruments. A detector is also designed to compare the ripple voltage and a predefined threshold voltage so as to indicate the possible failure of Switched Mode Power Supply (SMPS) well in advance by monitoring the output ripple increase.
Novelty: Having a fault tolerant power supply is very important in safety critical applications. Here by monitoring the output ripple variation, the degradation of AEC is predicted by calculating the ESR and capacitance variation. This simple yet effective prognostic detection will support in the design of fault tolerant power supplies.
Highlight: It is found that, the ripple at the output increases with aging of the electrolytic capacitor, as with time the equivalent capacitance decreases and Equivalent Series Resistance (ESR) of the capacitor increases. The designed detector output is found to prognostically indicate the failure of SMPS.
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Authors and Affiliations

Preethi Sharma K
1
T. Vijayakumar
1

  1. Department of ECE, SJB Institute of Technology, Bengaluru, India
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Abstract

This paper discusses selected problems regarding a high-frequency improved current-fed quasi-Z-source inverter (iCFqZSI) designed and built with SiC power devices. At first, new, modified topology of the impedance network is presented. As the structure is derived from the series connection of two networks, the voltage stress across the SiC diodes and the inductors is reduced by a factor of two. Therefore, the SiC MOSFETs may be switched with frequencies above 100 kHz and volume and weight of the passive components is decreased. Furthermore, additional leg with two SiC MOSFETs working as a bidirectional switch is added to limit the current stress during the short-through states. In order to verify the performance of the proposed solution a 6 kVA laboratory model was designed to connect a 400 V DC source (battery) and a 3£400 V grid. According to presented simulations and experimental results high-frequency iCFqZSI is bidirectional – it may act as an inverter, but also as a rectifier. Performed measurements show correct operation at switching frequency of 100 kHz, high quality of the input and output waveforms is observed. The additional leg increases efficiency by up to 0.6% – peak value is 97.8%.

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Authors and Affiliations

P. Trochimiuk
M. Zdanowski
J. Rabkowski
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Abstract

This paper deals with the implementation of a DC and AC double-gate MOSFET compact model in the Verilog- AMS language for the transient simulation and the configuration of ultra low-power analog circuits. The Verilog-AMS description of the proposed model is inserted in SMASH circuit simulator for the transient simulation and the configuration of the Colpitts oscillator, the common-source amplifier, and the inverter. The proposed model has the advantages of being simple and compact. It was validated using TCAD simulation results of the same transistor realized with Silvaco Software.
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Bibliography

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[16] B. Smaani, M. Bella, S. Latreche, “Compact Modeling of Lightly Doped Nanoscale DG MOSFET Transistor,” Applied Mechanics and Materials, 2014, 492, 06–10.
[17] O. Samy, H. Abdelhamid , Y. Ismail, A. Zekry, “A 2D compact model for lightly doped DG MOSFETs (P-DGFETs) including negative bias temperature instability (NBTI) and short channel effects (SCEs),” Microelectronics Reliability, 2016, 67, 82-88.
[18] Y. Taur, X. Liang, “A continuous, analytic drain-current model for DG MOSFETs,” IEEE Electron device Letters, 2004, 25, 2, 107–109.
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[20] H. Børli, S. Kolberg, “Capacitance modeling of short-channel double-gate MOSFETs,” Solid-State Electronics, 2008, 52, 1486–1490.
[21] C. Enz, F. Krummenacher, A.Vittoz, “An analytical MOS Transistor Model Valid in All Regions of Operation Dedicated to low voltage and low current applications,” Analog and integrated Circuits and Signal Processing, 1995, 8, 83-114.
[22] M. Bella, S. Latreche, C. Gontrand, “Nanoscale DGMOSFET: DC modification and Analysis of Noise in RF Oscillator,” Journal of Applied Sciences,2015, 5, 800–807.
[23] R. Blaise, W. Tekam, J. Kengne, G. D. Kenmoe, “High frequency Colpitts’ oscillator: A simple configuration for chaos generation,” Chaos, Solitons & Fractals, 2019, 126, 351–360.
[24] A.Rana1, P. Gaikwad, “Colpitts oscillator: design and performance optimization,” Int. Journal of Applied Sciences and Engineering Research, 2014, 3, 913–919.
[25] SMASH User Manual Version 5.18 Release, 2012.
[26] Device simulator ATLAS, Silvaco International, 2007.
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Authors and Affiliations

Billel Smaani
1
Yacin Meraihi
2
Fares Nafa
2
Mohamed Salah Benlatreche
3
Hamza Akroum
4
Saida Latreche
5

  1. Ingénierie des Systémes Electriques Department, Faculty of Technology, Boumerdes University, Algeria
  2. Laboratoire d'Ingénierie et Systèmes de Télécommunications, Faculté de Technologie, Boumerdes, Algeria
  3. Centre Universitaire Abdel Hafid Boussouf Mila, Algeria
  4. Laboratoire d’Automatique Appliquée, Université M’Hamed Bougara de Boumerdes, Algeria
  5. Laboratoire Hyperfréquences et Semiconducteurs, Electronique Department, Constantine 1 University, Algeria
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Abstract

The main drawback of any Design for Reliability methodology is lack of easy accessible reliability models, prepared individually for each critical component. In this paper, a reliability model for SiC power MOSFET in SOT – 227 B housing, subjected to power cycling, is presented. Discussion covers preparation of Accelerated Lifetime Test required to develop such reliability model, analysis of semiconductor degradation progress, samples post-failure analysis and identification of reliability model parameters. Such model may be further used for failure prognostics or useful lifetime estimation of High Performance Power Supplies.
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Bibliography

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Authors and Affiliations

Sebastian Bąba
1
ORCID: ORCID

  1. TRUMPF Huettinger Sp. z o.o., Research and Development Department, 05-220 Zielonka, Poland
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Abstract

Conceptions of analogue electronics circuit based on a multiple-input floating gate field-effect transistor MOS (MIFGMOS) have

been presented. The simple add and differential voltage amplifiers with one and two MIFGMOS transistors and multiple-input operational amplifiers with their application have been proposed. One of them was used for the realisation of a controlled floating resistor. Results of circuit simulations in SPICE programme using the simple substitute macromodel of MIFGMOS transistor have been shown.

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Authors and Affiliations

L. Topór-Kamiński
P. Holajn
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Abstract

The paper presents an overview of a method of nanosecond-scale high voltage pulse generation using magnetic compression circuits. High voltage (up to 18 kV) short pulses (up to 1.4 μs) were used for Pulsed Corona Discharge generation. In addition, the control signal of parallel connection of IGBT and MOSFET power transistor influence on system losses is discussed. For a given system topology, an influence of core losses on overall pulse generator efficiency is analysed.

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Authors and Affiliations

Michał Balcerak
Ryszard Pałka
Marcin Hołub
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Abstract

Food processing technologies for food preservation have been in constant development over a few decades in order to meet current consumer’s demands. Healthy competitive improvements are observed in both thermal and non-thermal food processing technology since past two decades due to technical revolution. Among these novel technologies, pulsed electric field food processing technology has shown to be a potential non-thermal treatment capable of preserving liquid foods. The high-voltage pulse generators specifically find their applications in pulsed electric field technology. So, this paper proposes a new structure of a high-voltage pulse generator with a cascaded boost converter topology. The choice of a cascaded boost converter helps in selecting low DC input voltage and hence the size and space requirement of the high-voltage pulse generator is minimized. The proposed circuit is capable of producing high-voltage pulses with flexibility of an adjusting duty ratio and frequency. The designed circuit generates a maximum peak voltage of 1 kV in the frequency range of 7.5–20 kHz and the pulse width range of 0.8–1.8 μs. Also, the impedance matching between the cascaded boost converter and the high-voltage pulse generator is found simple without further additional components. The efficiency can be improved in the circuit by avoiding low frequency transformers.
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Bibliography

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Authors and Affiliations

S. Krishnaveni
1
ORCID: ORCID
V. Rajini
1

  1. Sri Sivasubramaniya Nadar College of Engineering, India
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Abstract

With the extinction of fossil fuels and high increase in power demand, the necessity for renewable energy power generation has increased globally. Solar PV is one such renewable energy power generation, widely used these days in the power sector. The inverters used for power conversion suffer from power losses in the switching elements. This paper aims at the detailed analysis on switching losses in these inverters and also aims at increasing the efficiency of the inverter by reducing losses. Losses in these power electronic switches vary with their types. In this analysis the most widely used semiconductor switches like the insulated gate bipolar transistor (IGBT) and metal oxide semiconductor field effect transistor (MOSFET) are compared. Also using the sinusoidal pulse width modulation (SPWM) technique, improves the system efficiency considerably. Two SPWM-based singlephase inverters with the IGBT and MOSFET are designed and simulated in a MATLAB Simulink environment. The voltage drop and, thereby, the power loss across the switches are compared and analysed. The proposed technique shows that the SPWM inverter with the IGBT has lower power loss than the SPWM inverter with the MOSFET.
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Authors and Affiliations

Sivaraj Panneerselvam
1
ORCID: ORCID
Karunanithi Kandasamy
1
ORCID: ORCID
Chandrasekar Perumal
1
ORCID: ORCID

  1. Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology, Chennai, Tamil Nadu, India
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Abstract

In this paper, a low power highly sensitive Triple Metal Surrounding Gate (TM-SG) Nanowire MOSFET photosensor is proposed which uses triple metal gates for controlling short channel effects and III–V compound as the channel material for effective photonic absorption. Most of the conventional FET based photosensors that are available use threshold voltage as the parameter for sensitivity comparison but in this proposed sensor on being exposed to light there is a substantial increase in conductance of the GaAs channel underneath and, thereby change in the subthreshold current under exposure is used as a sensitivity parameter (i.e., Iillumination/IDark). In order to further enhance the device performance it is coated with a shell of AlxGa1-xAs which effectively passivates the GaAs surface and provides a better carrier confinement at the interface results in an increased photoabsorption. At last performance parameters of TM-SG Bare GaAs Nanowire MOSFET are compared with TM-SG core-shell GaAs/AlGaAs Nanowire MOSFET and the results show that Core-Shell structures can be a better choice for photodetection in visible region.

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Authors and Affiliations

S.K. Sharma
A. Jain
B. Raj
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Abstract

High-speed switching capabilities of SiC MOSFET power modules allow building high power converters working with elevated switching frequencies offering high efficiencies and high power densities. As the switching processes get increasingly rapid, the parasitic capacitances and inductances appearing in SiC MOSFET power modules affect switching transients more and more significantly. Even relatively small parasitic capacitances can cause a significant capacitive current flow through the SiC MOSFET power module. As the capacitive current component in the drain current during the turn-off process is significant, a commonly used method of determining the switching power losses based on the product of instantaneous values of drain-source voltage and drain current may lead to a severe error. Another problem is that charged parasitic capacitances discharge through the MOSFET resistive channel during the turn-on process. As this happens in the internal structure, that current is not visible on the MOSFET terminals. Fast switching processes are challenging to measure accurately due to the imperfections of measurement probes, like their output signals delay mismatch. This paper describes various problems connected with the correct determination of switching power losses in high-speed SiC MOSFET power modules and proposes solutions to these problems. A method of achieving a correct time alignment of waveforms collected by voltage and current probes has been shown and verified experimentally. In order to estimate SiC MOSFET channel current during the fast turn-off process, a method based on the estimation of nonlinear parasitic capacitances current has also been proposed and verified experimentally
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Authors and Affiliations

Dawid Zięba
1
ORCID: ORCID
Jacek Rąbkowski
2

  1. Medcom Company, Jutrzenki 78A, 02-230 Warsaw, Poland
  2. University of Technology, Institute of Control and Industrial Electronics, Koszykowa 75, 00-662 Warsaw, Poland
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Abstract

The paper presents a concept of a control system for a high-frequency three-phase PWM grid-tied converter (3x400 V / 50 Hz) that performs functions of a 10-kW DC power supply with voltage range of 600÷800 V and of a reactive power compensator. Simulation tests (in PLECS) allowed proper selection of semiconductor switches between fast IGBTs and silicon carbide MOSFETs. As the main criterion minimum amount of power losses in semiconductor devices was adopted. Switching frequency of at least 40 kHz was used with the aim of minimizing size of passive filters (chokes, capacitors) both on the AC side and on the DC side. Simulation results have been confirmed in experimental studies of the PWM converter, the power factor of which (inductive and capacitive) could be regulated in range from 0.7 to 1.0 with THDi of line currents below 5% and energy efficiency of approximately 98.5%. The control system was implemented in Texas Instruments TMS320F28377S microcontroller.

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Authors and Affiliations

Roman Barlik
Piotr Grzejszczak
Bernard Leszczyński
Marek Szymczak

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