Search results

Filters

  • Journals
  • Authors
  • Keywords
  • Date
  • Type

Search results

Number of results: 6
items per page: 25 50 75
Sort by:
Download PDF Download RIS Download Bibtex

Abstract

The paper presents a heuristic approach to the problem of analog circuit diagnosis. Different optimization techniques in the field of test point selection are discussed. Two new algorithms: SALTO and COSMO have been introduced. Both searching procedures have been implemented in a form of the expert system in PROLOG language. The proposed methodologies have been exemplified on benchmark circuits. The obtained results have been compared to the others achieved by different approaches in the field and the benefits of the proposed methodology have been emphasized. The inference engine of the heuristic algorithms has been presented and the expert system knowledge-base construction discussed.

Go to article

Authors and Affiliations

Andrzej Pułka
Download PDF Download RIS Download Bibtex

Abstract

A new soft-fault diagnosis approach for analog circuits with parameter tolerance is proposed in this paper. The approach uses the fuzzy nonlinear programming (FNLP) concept to diagnose an analog circuit under test quantitatively. Node-voltage incremental equations, as constraints of FNLP equation, are built based on the sensitivity analysis. Through evaluating the parameters deviations from the solution of the FNLP equation, it enables us to state whether the actual parameters are within tolerance ranges or some components are faulty. Examples illustrate the proposed approach and show its effectiveness.

Go to article

Authors and Affiliations

Wei Zhang
Longfu Zhou
Yibing Shi
Chengti Huang
Yanjun Li
Download PDF Download RIS Download Bibtex

Abstract

Analog circuits need more effective fault diagnosis methods. In this study, the fault diagnosis method of analog circuits was studied. The fault feature vectors were extracted by a wavelet transform and then classified by a generalized regression neural network (GRNN). In order to improve the classification performance, a wolf pack algorithm (WPA) was used to optimize the GRNN, and a WPA-GRNN diagnosis algorithm was obtained. Then a simulation experiment was carried out taking a Sallen–Key bandpass filter as an example. It was found from the experimental results that the WPA could achieve the preset accuracy in the eighth iteration and had a good optimization effect. In the comparison between the GRNN, genetic algorithm (GA)-GRNN and WPA-GRNN, the WPA-GRNN had the highest diagnostic accuracy, and moreover it had high accuracy in diagnosing a single fault than multiple faults, short training time, smaller error, and an average accuracy rate of 91%. The experimental results prove the effectiveness of the WPA-GRNN in fault diagnosis of analog circuits, which can make some contributions to the further development of the fault diagnosis of analog circuits.

Go to article

Authors and Affiliations

Hui Wang
Download PDF Download RIS Download Bibtex

Abstract

This paper deals with the implementation of a DC and AC double-gate MOSFET compact model in the Verilog- AMS language for the transient simulation and the configuration of ultra low-power analog circuits. The Verilog-AMS description of the proposed model is inserted in SMASH circuit simulator for the transient simulation and the configuration of the Colpitts oscillator, the common-source amplifier, and the inverter. The proposed model has the advantages of being simple and compact. It was validated using TCAD simulation results of the same transistor realized with Silvaco Software.
Go to article

Bibliography

[1] N. Arora, “MOSFET Modeling for VLSl Circuit Simulation: Theory and Practice,” World Scientific, 1993.
[2] International Technology Roadmap for Semiconductors. Available: http://www.itrs2.net, 2017.
[3] O. Samy, H. Abdelhamid, Y. Ismail, A. Zekry, “A 2D compact model for lightly doped DGMOSFETs (P-DGFETs) including negative bias temperature instability (NBTI) and short channel effects (SCEs),” Microelectronics reliability, 2016, 67, 82-88.
[4] J-P. Colinge, “FinFETs and Other Multi-Gate Transistors,” Springer, 2008.
[5] A. Amara, “Planar Double-Gate Transistor, From Technology to Circuit,” Springer, 2009.
[6] D. Stefanović, M. Kayal, M, “Structured Analog CMOS Design,” Springer, 2008.
[7] A. Mangla, M.-A. Chalkiadaki, F. Fadhuile, T. Taris, Y. Deval, C. C. Enz, “Design methodology for ultra low-power analog circuits using next generation BSIM6 MOSFET compact model,” Microelectronics journal, 2013, 44, 570-575.
[8] A.B. Bhattacharyya, “Compact MOSFET models for VLSI design,” Wiley, 2009.
[9] B. Smaani, S. Latreche, B. Iñiguez, „Compact drain-current model for undoped cylindrical surrounding-gate MOSFETs including short channel effects,” J. Appl. Phys., 2013, 114.
[10] J-M. Sallese, F. Krummenacher, F. Prégaldiny, „A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism,” Solid-State Electronics, 2012, 49, 485-489.
[11] O. Moldovan, F. Lime, S. Barraud, B. Smaani, „Experimentally verified drain-current model for variable barrier transistor,” IET Electronics Letters, 2015, 51, 17, 364–366.
[12] J. Alvarado, B. Iñiguez, M. Estrada, “Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation,” Int. J. Numer. Model, 2010, 23, 88–106.
[13] O. Cobianu, M. Soffke, A. Glesner, “Verilog-A model of an undoped symmetric dual-gate MOSFET,” Int. Adv. Radio Sci, 2006, 4, 303–306.
[14] M. Cheralathan, E. Contreras, J. Alvarado, “Implementation of nanoscale double-gate CMOS circuits using compact advanced transport models,” Microelectronics Journal, 2013, 44, 80–85. [15] Verilog-AMS User Manual, Accellera 2006.
[16] B. Smaani, M. Bella, S. Latreche, “Compact Modeling of Lightly Doped Nanoscale DG MOSFET Transistor,” Applied Mechanics and Materials, 2014, 492, 06–10.
[17] O. Samy, H. Abdelhamid , Y. Ismail, A. Zekry, “A 2D compact model for lightly doped DG MOSFETs (P-DGFETs) including negative bias temperature instability (NBTI) and short channel effects (SCEs),” Microelectronics Reliability, 2016, 67, 82-88.
[18] Y. Taur, X. Liang, “A continuous, analytic drain-current model for DG MOSFETs,” IEEE Electron device Letters, 2004, 25, 2, 107–109.
[19] J-M. Sallese, A. S. Porret, “A novel approach to charge-based non-quasi-static model of the MOS transistor valid in all modes of operation,” Solid-State Electronics, 2000, 44, 887-894.
[20] H. Børli, S. Kolberg, “Capacitance modeling of short-channel double-gate MOSFETs,” Solid-State Electronics, 2008, 52, 1486–1490.
[21] C. Enz, F. Krummenacher, A.Vittoz, “An analytical MOS Transistor Model Valid in All Regions of Operation Dedicated to low voltage and low current applications,” Analog and integrated Circuits and Signal Processing, 1995, 8, 83-114.
[22] M. Bella, S. Latreche, C. Gontrand, “Nanoscale DGMOSFET: DC modification and Analysis of Noise in RF Oscillator,” Journal of Applied Sciences,2015, 5, 800–807.
[23] R. Blaise, W. Tekam, J. Kengne, G. D. Kenmoe, “High frequency Colpitts’ oscillator: A simple configuration for chaos generation,” Chaos, Solitons & Fractals, 2019, 126, 351–360.
[24] A.Rana1, P. Gaikwad, “Colpitts oscillator: design and performance optimization,” Int. Journal of Applied Sciences and Engineering Research, 2014, 3, 913–919.
[25] SMASH User Manual Version 5.18 Release, 2012.
[26] Device simulator ATLAS, Silvaco International, 2007.
Go to article

Authors and Affiliations

Billel Smaani
1
Yacin Meraihi
2
Fares Nafa
2
Mohamed Salah Benlatreche
3
Hamza Akroum
4
Saida Latreche
5

  1. Ingénierie des Systémes Electriques Department, Faculty of Technology, Boumerdes University, Algeria
  2. Laboratoire d'Ingénierie et Systèmes de Télécommunications, Faculté de Technologie, Boumerdes, Algeria
  3. Centre Universitaire Abdel Hafid Boussouf Mila, Algeria
  4. Laboratoire d’Automatique Appliquée, Université M’Hamed Bougara de Boumerdes, Algeria
  5. Laboratoire Hyperfréquences et Semiconducteurs, Electronique Department, Constantine 1 University, Algeria
Download PDF Download RIS Download Bibtex

Abstract

This paper presents a novel strategy of fault classification for the analog circuit under test (CUT). The proposed classification strategy is implemented with the one-against-one Support Vector Machines Classifier (SVC), which is improved by employing a fault dictionary to accelerate the testing procedure. In our investigations, the support vectors and other relevant parameters are obtained by training the standard binary support vector machines. In addition, a technique of radial-basis-function (RBF) kernel parameter evaluation and selection is invented. This technique can find a good and proper kernel parameter for the SVC prior to the machine learning. Two typical analog circuits are demonstrated to validate the effectiveness of the proposed method.

Go to article

Authors and Affiliations

Jiang Cui
Youren Wang
Download PDF Download RIS Download Bibtex

Abstract

While the Slope Fault Model method can solve the soft-fault diagnosis problem in linear analog circuit effectively, the challenging tolerance problem is still unsolved. In this paper, a proposed Normal Quotient Distribution approach was combined with the Slope Fault Model to handle the tolerances problem in soft-fault diagnosis for analog circuit. Firstly, the principle of the Slope Fault Model is presented, and the huge computation of traditional Slope Fault Characteristic set was reduced greatly by the elimination of superfluous features. Several typical tolerance handling methods on the ground of the Slope Fault Model were compared. Then, the approximating distribution function of the Slope Fault Characteristic was deduced and sufficient conditions were given to improve the approximation accuracy. The monotonous and continuous mapping between Normal Quotient Distribution and standard normal distribution was proved. Thus the estimation formulas about the ranges of the Slope Fault Characteristic were deduced. After that, a new test-nodes selection algorithm based on the reduced Slope Fault Characteristic ranges set was designed. Finally, two numerical experiments were done to illustrate the proposed approach and demonstrate its effectiveness.

Go to article

Authors and Affiliations

Yongcai Ao
Yibing Shi
Wei Zhang
Xifeng Li

This page uses 'cookies'. Learn more