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Abstract

The paper presents an analogue circuit testing method that engages the analysis of the time response to a non-periodic stimulus specialized for the verification of selected specifications. The decision about the current circuit diagnostic state depends on an amplitude spectrum decomposition of the time response measured during the test. A shape of the test excitation spectrum is optimized with the use of a differential evolution algorithm and it allows for achieving maximum fault coverage and the optimal conditions for fault isolation. Genotypes of the evolutionary system encode the amplitude spectrum of candidates for testing stimuli by means of rectangle frequency windows with amplitudes determined evolutionarily.

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Authors and Affiliations

Tomasz Golonek
Piotr Jantos
Jerzy Rutkowski
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Abstract

The paper presents a novel heuristic procedure (further called the AH Method) to investigate function shape in the direct vicinity of the found optimum solution. The survey is conducted using only the space sampling collected during the optimization process with an evolutionary algorithm. For this purpose the finite model of point-set is considered. The statistical analysis of the sampling quality based upon the coverage of the points in question over the entire attraction region is exploited. The tolerance boundaries of the parameters are determined for the user-specified increase of the objective function value above the found minimum. The presented test-case data prove that the proposed approach is comparable to other optimum neighborhood examination algorithms. Also, the AH Method requires noticeably shorter computational time than its counterparts. This is achieved by a repeated, second use of points from optimization without additional objective function calls, as well as significant repository size reduction during preprocessing.
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Authors and Affiliations

Daniel Andrzej Piętak
1
Piotr Bilski
1
ORCID: ORCID
Paweł Jan Napiórkowski
2

  1. Institute of Radioelectronics and Multimedia Technology, Warsaw University of Technology, Poland
  2. Heavy Ion Laboratory, University of Warsaw, Poland
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Abstract

The method described in this work allows to determine the optimal distribution of pulses of digital signal as well as the non-linear mathematical model based on a multiple regression statistical analysis, which are specialized to an effective and low-cost testing of functional parameters in analog electronic circuits. The aim of this concept is to simplify the process of analog circuit specification validation and minimize hardware implementation, time and memory requirements during the testing stage. This strategy requires simulations of the analyzed analog electronic circuit; however, this effort is done only once – before the testing stage. Then, validation of circuit specification can be obtained after a quick, very low-cost procedure without time consuming computations and without expensive external measuring equipment usage. The analyzed test signature is a time response of the analog circuit to the stream of digital pulses for which distributions were determined during evolutionary optimization cycles. Besides, evolutionary computations assure determination of the optimal form and size of the non-linear mathematical formula used to estimate specific functional parameters. Generally, the obtained mathematical model has a structure similar to the polynomial one with terms calculated by means of multiple regression procedure. However, a higher ordered polynomial usage makes it possible to reach non-linear estimation model that improves accuracy of circuit parametric identification. It should be noted that all the evolutionary calculations are made only at the before test stage and the main computational effort, for the analog circuit specification test design, is necessary only once. Such diagnosing system is fully synchronized by a global digital signal clock that precisely determines time points of the slopes of input excitation pulses as well as acquired output signature samples. Efficiency of the proposed technique is confirmed by results obtained for examples based on analog circuits used in previous (and other) publications as test benchmarks.

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Authors and Affiliations

T. Golonek
Ł. Chruszczyk

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