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Abstract

The paper contains a short literature review on the subject of special type of thin film structures with resistiveswitching memory effect. In the literature, such structures are commonly labeled as "memristors". The word "memristor" originates from two words: "memory" and "resistor". For the first time, the memristor was theoretically described in 1971 by Leon Chua as the 4th fundamental passive electronics element with a non-linear current-voltage behavior. The reported area of potential usage of memristor is enormous. It is predicted that the memristor could find application, for example in the domain of nonvolatile random access memory, flash memory, neuromorphic systems and so forth. However, in spite of the fact that plenty of papers have been published in the subject literature to date, the memristor still behaves as a "mysterious" electronic element. It seems that, one of the important reasons that such structures are not yet in practical use, is unsufficient knowledge of physical phenomena determining occurrence of the switching effect. The present paper contains a literature review of available descriptions of theoretical basis of the memristor structures, used materials, structure configurations and discussion about future prospects and limitations.

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Authors and Affiliations

Jarosław Domaradzki
Damian Wojcieszak
Tomasz Kotwica
Ewa Mańkowska
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Abstract

This paper discusses a mem-capacitor circuit which is based on two MO-OTA along with a multiplier and 4 passive elements. This circuit is a charge-controlled memcapacitor emulator which is independent of any memristor also it consists the feature of electronic tunability. Additionally, this circuit is simpler and uses less hardware because it lacks a mutator and uses fewer active-passive components. The circuit behaviour is justified through various simulations in cadence Orcad tool with 180nm CMOS TSMC parameters. Additionally, conclusions from simulations and theory are validated experimentally through commercially available IC.
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Authors and Affiliations

Chandra Shankar
1
Anuj Nagar
1
Ashutosh Singh
1
Ankleshwar Kumar
1

  1. Department of Electronics & Communication Engineering, JSS Academy of Technical Education, NOIDA, Uttar Pradesh, India
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Abstract

This work aims to improve the total power dissipation, leakage currents and stability without disturbing the logic state of SRAM cell with concept called sub-threshold operation. Though, sub-threshold SRAM proves to be advantageous but fails with basic 6T SRAM cell during readability and writability. In this paper we have investigated a non-volatile 6T2M (6 Transistors & 2 Memristors) sub-threshold SRAM cell working at lower supply voltage of VDD=0.3V, where Memristor is used to store the information even at power failures and restores previous data with successful read and write operation overcomes the challenge faced. This paper also proposes a new configuration of non-volatile 6T2M (6 Transistors & 2 Memristors) subthreshold SRAM cell resulting in improved behaviour in terms of power, stability and leakage current where read and write power has improved by 40% and 90% respectively when compared to 6T2M (conventional) SRAM cell. The proposed 6T2M SRAM cell offers good stability of RSNM=65mV and WSNM=93mV which is much improved at low voltage when compared to conventional basic 6T SRAM cell, and improved leakage current of 4.92nA is achieved as compared.
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Authors and Affiliations

Zeba Mustaqueem
1
Abdul Quaiyum Ansari
1
Md Waseem Akram
1

  1. Jamia Milia Islamia Central University, India

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