The problem of management of memory in a signal processor has been discussed on the example of time parameters measurement system of transient signals. General rules of memory management and allocation in TMS320C6713 DSK have been described.

The In the paper, we investigate two single processor problems, which deal with the process of negotiation between a producer and a customer about delivery time of final products. This process is modelled by a due interval, which is a generalization of well known classical due date and describes a time interval, in which a job should be finished. In this paper we consider two diffierent mathematical models of due intervals. In both considered problems we should find such a schedule of jobs and such a determination of due intervals to each job, that the generalized cost function is minimized. The cost function is the maximum of the following three weighted parts: the maximum tardiness, the maximum earliness and the maximum due interval size. For the first problem we proved several properties of its optimal solution and next we show the mirror image property for both of considered problems, which helps us to provide an optimal solution for the second problem.

The article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 μm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image processing algorithms. The prototype with a resolution of 32 × 32 pixels allows the acquisition and processing of images at high speed, up to 2000 frames/s. Operation of the prototypes was verified in practice using the developed software and a measurement system based on a FPGA platform.

In this paper, we investigate the implementation schemes of a single-scale wavelet transform processor using magnetostatic surface wave (MSSW) devices. There are three implementation schemes: the interdigital transducer, the meander line transducer and the grating transducer. Because the interdigital transducer has excellent properties, namely, good frequency characteristic and low insertion loss, we use the interdigital transducer as the implementation scheme of a single-scale wavelet transform processor using MSSW device.

In the paper, we also present the solutions to the three key problems: the direct coupling between the input transducer and the output transducer, the insertion loss, and the loss characteristics of the gyromagnetic film having an influence on the wavelet transform processor. There are two methods of reducing the direct coupling between the input transducer and the output transducer: increasing the distance between the input transducer and the output transducer, and placing a metal “wall” between the input transducer and the output transducer. There also are two methods of reducing the insertion loss of a single-scale wavelet transform processor using a MSSW device for scale: the appropriate thickness of the yttrium iron garnet (YIG) film and the uniform magnetic field.The smaller the ferromagnetic resonance linewidth of the gyromagnetic film , the smaller the magnetostatic wave propagation loss.

This work present an efficient hardware architecture of Support Vector Machine (SVM) for the classification of Hyperspectral remotely sensed data using High Level Synthesis (HLS) method. The high classification time and power consumption in traditional classification of remotely sensed data is the main motivation for this work. Therefore presented work helps to classify the remotely sensed data in real-time and to take immediate action during the natural disaster. An embedded based SVM is designed and implemented on Zynq SoC for classification of hyperspectral images. The data set of remotely sensed data are tested on different platforms and the performance is compared with existing works. Novelty in our proposed work is extend the HLS based FPGA implantation to the onboard classification system in remote sensing. The experimental results for selected data set from different class shows that our architecture on Zynq 7000 implementation generates a delay of 11.26 μs and power consumption of 1.7 Watts, which is extremely better as compared to other Field Programmable Gate Array (FPGA) implementation using Hardware description Language (HDL) and Central Processing Unit (CPU) implementation.