@ARTICLE{Cieszewski_Radoslaw_Advanced_2024,
 author={Cieszewski, Radoslaw and Romaniuk, Ryszard and Poźniak, Krzysztof and Linczuk, Maciej},
 volume={vol. 70},
 number={No 4},
 pages={1049–1056},
 journal={International Journal of Electronics and Telecommunications},
 howpublished={online},
 year={2024},
 publisher={Polish Academy of Sciences Committee of Electronics and Telecommunications},
 abstract={This paper explores advanced techniques in highlevel synthesis (HLS) utilizing metamodel structures. Metamodels act as models of hardware models, generating internal hardware models based on parameter inputs and exploring the solution space to find optimal configurations. The focus is on enhancing HLS processes through metamodeling, enabling more efficient hardware design and optimization. Key contributions include a novel metamodel framework and a case study demonstrating its application in complex system designs. The proposed methods show significant improvements in synthesis efficiency and scalability, making them highly relevant for modern FPGA and ASIC design workflows.},
 title={Advanced High-Level Synthesis techniques based on metamodel},
 type={Article},
 URL={http://journals.pan.pl/Content/133233/PDF-MASTER/33_4733_Cieszewski_L_sk.pdf},
 doi={10.24425/ijet.2024.152093},
 keywords={High-Level Synthesis, Metamodel, FPGA, Optimization, Hardware Design, Digital Signal Processing, System Design},
}