@ARTICLE{Shi_Jun_Layout_2020,
 author={Shi, Jun},
 volume={vol. 66},
 number={No 2},
 journal={International Journal of Electronics and Telecommunications},
 pages={287-293},
 howpublished={online},
 year={2020},
 publisher={Polish Academy of Sciences Committee of Electronics and Telecommunications},
 abstract={Operational amplifies (op amps) are an integral part of many analog and mixed-signal systems. Op amps with vastly different levels of complexity are used to realize functions ranging from DC bias generation to high-speed amplification or filtering. The design of op amps continues to pose a challenge as the supply voltage and transistor channel lengths scale down with each generation of CMOS technologies. The thesis deals with the analysis, design and layout optimization of CMOS op amps in deep Submicron (DSM) from a study case. Finally, layout optimizations of op amps will be given, in which propose optimization techniques to mitigate these DSM effects in the place-and-route stage of VLSI physical design.},
 type={Article},
 title={Layout Optimizations of Operational Amplifiers in Deep Submicron},
 URL={http://journals.pan.pl/Content/115203/PDF/39_2020.pdf},
 doi={10.24425/ijet.2020.131876},
 keywords={Layout Optimization, Deep Submicron (DSM), Operational Amplifier, place-and-route},
}