Tytuł artykułu

Petri Net Based Specification in the Design of Logic Controllers with Exception Handling Mechanism

Tytuł czasopisma

International Journal of Electronics and Telecommunications

Rocznik

2012

Wolumin

vol. 58

Numer

No 1

Autorzy

Doligalski, Michał ; Adamski, Marian

Wydział PAN

Nauki Techniczne

Wydawca

Polish Academy of Sciences Committee of Electronics and Telecommunications

Data

2012

Identyfikator

DOI: 10.2478/v10177-012-0006-6 ; eISSN 2300-1933 (since 2013) ; ISSN 2081-8491 (until 2012)

Źródło

International Journal of Electronics and Telecommunications; 2012; vol. 58; No 1

Referencje

Adamski M. (2005), Design of embedded control systems, 15, doi.org/10.1007/0-387-28327-7_2 ; Gajski D. (1994), Specification and design of embedded systems. ; Andreu D. (2008), Petri net based rapid prototyping of digital complex system, null, 405, doi.org/10.1109/ISVLSI.2008.54 ; G. Bazydło, "Graphical specification of programs for reconfigurable logic controllers using uml," Ph.D. dissertation, University of Zielona Góra, 2010. ; Basile F. (2009), A two-stage modelling architecture for distributed control of real-time industrial systems: Application of uml and petri net, Comput. Stand. Interfaces, 31, 528, doi.org/10.1016/j.csi.2008.03.021 ; Doligalski M. (2010), Exceptions and deep history state handling using dual specification, Electrical Review, 9, 9, 123. ; Łabiak G. (2008), Concurrent processes synchronisation in statecharts for fpga implementation, null, 59, doi.org/10.1109/EWDTS.2008.5580158 ; Doligalski M. (2007), Partial reconfiguration-oriented design of logic controllers, null, 6937, 10, doi.org/10.1117/12.784663