Title

Logarithmic ADC with Accumulation of Charge and Impulse Feedback – Analysis and Modeling

Journal title

International Journal of Electronics and Telecommunications

Yearbook

2021

Volume

vol. 67

Issue

No 4

Authors

Mychuda, Zynoviy ; Mychuda, Lesya ; Antoniv, Uliana ; Szcześniak, Adam

Affiliation

Mychuda, Zynoviy : Lviv Polytechnic National University, Department of the Computer-Assisted Systems of Automation, Ukraine ; Mychuda, Lesya : Lviv Polytechnic National University, Department of the Computer-Assisted Systems of Automation, Ukraine ; Antoniv, Uliana : Lviv Polytechnic National University, Department of the Computer-Assisted Systems of Automation, Ukraine ; Szcześniak, Adam : University of Technology in Kielce, Department of Mechatronics and Machine Building, Poland

Keywords

Analog-to-digital converter ; analysis ; construction ; charge accumulation ; logarithm ; modeling ; impulse feedback

Divisions of PAS

Nauki Techniczne

Coverage

705-710

Publisher

Polish Academy of Sciences Committee of Electronics and Telecommunications

Bibliography

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[2] J. Lee, J. Kang, S. Park, J. Seo, J. Anders, J. Guilherme, M. P. Flynn, “A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC,” IEEE Journal Of Solid-State Circuits, 44 (2009), no.10, pp. 2755-2765
[3] B. Maundy, D. Westwick, S. Gift, “On a class of pseudo-logarithmic amplifiers suitable for use with digitally switched resistors,” Int. J. of Circuit Theory and Applications, vol. 36 (2008), no.1, pp. 81–108
[4] B. Maundy, D. Westwick, S. Gift, (2007) “A useful pseudo-logarithmic circuit,” Microelectronics International, Vol. 24 Iss: 2, pp.35 - 45
[5] M. Alirieza, L. Jing and J. Dileepan, “Digital Pixel Sensor Array with Logarithmic Delta-Sigma Architecture,” Sensors, 13(8), pp. 10765-10782, August 2013
[6] J. Guilherme, J. Vital, Jose Franca, “A True Logarithmic Analog-to-Digital Pipeline Convener with 1.5bitistage and Digital Correction,” Proc. IEEE International Conference on Electronics Circuits and Systems, pp. 393-396, Malta 2001
[7] G. Bucci, M. Faccio, C. Landi, “The performance test of a piece-linear A/D converter,” IEEE Instrumentation and Measurement Technology Conference, St. Paul USA May 1998, pp.1223.1228
[8] J. Guilherme, J. Vital, J. Franca, “A CMOS Logarithmic Pipeline A/D Converter with a Dynamic Range of 80 dB,” IEEE Electronics, Circuits and Systems, 2002. 9th International Conference on, (2002), no.3/02, pp. 193-196
[9] J. Sit and R. Sarpeshkar, “A Micropower Logarithmic A/D With Offset and Temperature Compensation,” IEEE J. Solid-State Circuits, 39 (2004), nr. 2, pp. 308-319
[10] J. Mahattanakul, “Logarithmic data converter suitable for hearing aid applications,” Electronic Letters, 41 (2005), no.7, pp. 31-32
[11] S. Sirimasakul, A. Thanachayanont, W. Jeamsaksiri, “Low-Power Current-Mode Logarithmic Pipeline Analog-to-Digital Converter for ISFET based pH Sensor,” IEEE ISCIT, 2009, no.6/09, pp. 1340-1343
[12] M. Santosa, N. Hortaa, J. Guilherme, “A survey on nonlinear analog-to-digital converters,” Integration, the VLSI Journal, Volume 47, Issue 1, pp. 12–22, January 2014
[13] Z.R. Mychuda, “Logarithmic Analog-To-Digital Converters – ADC of the Future,” Prostir, Lviv, Ukraine 2002, pp. 242
[14] A. Szcześniak, Z Myczuda, “A method of charge accumulation in the logarithmic analog-to-digital converter with a successive approximation,” Electrical Review, 86 (2010), no.10, pp. 336-340
[15] A. Szcześniak, U. Antoniw, Ł. Myczuda, Z. Myczuda, „Logarytmiczne przetworniki analogowo-cyfrowe z nagromadzeniem ładunku i impulsowym sprzężeniem zwrotnym,” Electrical Review, R. 89 no. 8/2013, pp. 277 – 281
[16] A. Szcześniak, Z. Myczuda, „Analiza prądów upływu logarytmicznego przetwornika analogowo-cyfrowego z sukcesywną aproksymacją,” Electrical Review, 88 (2012), no. 5а, pp. 247-250
[17] J.H. Moon, D. Y. Kim, M. K. Song, Patent No. KR20110064514A, “Logarithmic Single-Slope Analog Digital Convertor, Image Sensor Device And Thermometer Using The Same, And Method For Logarithmic Single-Slope Analog Digital Converting,”
[18] J. Gorisse, F. A. Cathelin, A. Kaiser, E. Kerherve Patent No. EP2360838A1, “Method for logarithmic analog-to-digital conversion of an analog input signal and corresponding apparatus,”
[19] R. Offen Patent No. DE102008007207A1 “Logarithmierender Analog-Digital Wandler,”
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Date

2021.12.27

Type

Article

Identifier

DOI: 10.24425/ijet.2021.137866