Applied sciences

International Journal of Electronics and Telecommunications


International Journal of Electronics and Telecommunications | 2014 | vol. 60 | No 1

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Abstract The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets - SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.
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Authors and Affiliations

Mariusz Węgrzyn
Janusz Sosnowski

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