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Abstract

The wet flashover voltage of medium voltage insulators made of a silicone rubber is 8% lower than the wet flashover voltage of a porcelain insulator with an identical profile. These surprising results, obtained in 2012, were confirmed again in 2019. The flashover development on the composite insulator is very short (less than 30 ms). On the other hand, on the porcelain insulator, the flashover develops longer (1–3 seconds). The Koppelmann equation was modified, and the Obenaus model to calculate the flashover voltage of insulators under the artificial rain was presented. Attention was paid to the importance of insulator diameters and the phenomenon of water cascades.
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Bibliography

[1] Kuhlman K., Hochspannungsisolatoren, Elektrotechnische Zeitschrift (in German), vol. 31, iss. 3, pp. 51–55 (1910).
[2] Lustgarten J., High-tension porcelain line insulators, Journal of the Institution of Electrical Engineers, vol. 49, pp. 235–279 (1912).
[3] IEC 60060-1:2010, High-voltage test techniques – Part 1: General definitions and test requirements, edition 3 (2010).
[4] Gallet G., How to design a rain apparatus for the dielectric tests, IEEE PES Summer Meeting, San Francisco, paper A 75 490-3 (1975).
[5] Huc J., Rowe S.W., Wet testing installation design, 5th Int. Symposium on High Voltage Engineering, Athens, paper 52.03 (1983).
[6] Chrzan K.L., Streubel H., Artificial rain test of outdoor long rod insulators, Int. Symposium on High Voltage Engineering, ISH, Cap Town, paper E-31 (2009).
[7] Rizk F.A.M., Kamel S.I., Modelling of HVDC wall bushing flashover in nonuniform rain, IEEE Trans. on Power Delivery, vol. 6, no. 4, pp. 1650–1662 (1991).
[8] Matsuoka M., Naito K., Irie T., Kondo K., Evaluation methods of polymer insulators under contaminated conditions, IEEE Transmission and Distribution Asia Pacific Conference, pp. 2197–2202 (2002).
[9] Chrzan K.L., Swierzyna Z., Artificial rain test of insulators, Przegl˛ad Elektrotechniczny (in Polish), no. 11b, pp. 218–221 (2012).
[10] Szpor S., Dzierzek H.,WiniarskiW., High voltage engineering, WNT (in Polish),Warsaw, vol. 1, p. 88 (1978).
[11] Estorff W., Cron H., High Voltage insulator as pollution problem, ETZ (in German), vol. 73, iss. 3, pp. 57–62 (1952).
[12] Chrzan K.L., Leakage currents on naturally contaminated porcelain and silicone insulators, IEEE Trans. on Power Delivery, vol. 25, no. 2, pp. 904–910 (2010), DOI: 10.1109/TPWRD.2009.2034665.
[13] Streubel H., Calculation of AC Flashover voltage under rain, Hermsdorfer Technische Mitteilungen (in German), iss. 31, pp. 974–980 (1971).
[14] Lan L., Gorur R.S., Computation of ac wet flashover voltage of ceramic and composite insulators, IEEE Transactions on Dielectrics and Electrical Insulation, vol. 15, no. 5, pp. 1346–1352 (2008), DOI: 10.1109/TDEI.2008.4656243.
[15] Erler F., About AC pollution flashover on thick insulators, Elektrie (in German), iss. 3, pp. 100–102 (1969).
[16] Hao Y., Liao Y., Kuang Z., Sun Y., Shang G., Zhang W., Mao G., Yang L., Zhang F., Li L., Experimental investigation on influence of shed parameters on surface rainwater characteristics of largediameter composite post insulators under rain conditions, Energies, vol. 13, no. 19, 5011 (2020), DOI: 10.3390/en13195011.
[17] Ely C.H.A., Lambeth P.J., Looms J.S.T., The booster shed: prevention of flashover of polluted substation insulators in heavy wetting, IEEE Transactions on Power Apparatus and Systems, vol. PAS-97, no. 6, pp. 2187–2197 (1978).
[18] Yang L., Kuang Z., Sun Y., Liao Y., Hao Y., Li L., Zhang F., Study on Surface Rainwater and Arc Characteristics of High-Voltage Bushing with Booster Sheds under Heavy Rainfall, IEEE Access, vol. 6, pp. 146865–146875 (2020), DOI: 10.1109/ACCESS.2020.3012978.
[19] Okada N., Ikeda K., Kondo K., Ito S., Contamination withstand voltage characteristics of hydrophobic polymers insulators under simulated rain conditions, IEEE Int. Symposium on Electrical Insulation, Boston, USA, pp. 228–231 (2002).
[20] Gorur R.S., de la O A., El-Kishky A., Chowdhary M., Mukherjee H., Sundaram R., Burnham J.T., Sudden flashovers of nonceramic insulators in artificial contamination tests, IEEE Transactions on Dielectrics and Electrical Insulation, vol. 3, no. 1, pp. 79–86 (1997), DOI: 10.1109/94.590870.
[21] Hartings R., The AC-Behavior of a Hydrophilic and Hydrophobic Post Insulator during Rain, IEEE Trans. on Power Delivery, vol. 9, no. 3, pp. 1584–1592 (1994).
[22] Wang S., Liang X., Huang L., Experimental study on the pollution flashover mechanism of polymer insulators, IEEE Power Engineering Society Winter Meeting, Singapore, pp. 2830–2833 (2000), DOI: 10.1109/PESW.2000.847332.
[23] de la O A., Gorur R.S., Flashover of contaminated nonceramic outdoor insulators in a wet atmosphere, IEEE Transactions on Dielectrics and Electrical Insulation, vol. 5, no. 6, pp. 814–823 (1998), DOI: 10.1109/94.740762.
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Authors and Affiliations

Krystian Leonard Chrzan
1
Henryk Marek Brzeziński
2

  1. Wroclaw University of Technology, Poland
  2. Łukasiewicz Research Network – Institute of Electrical Engineering, Poland
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Abstract

Digital system algorithms such as FFT algorithms, convolution, image processing algorithm, etc. deploy Multiply and Accumulate (MAC) unit as an evaluative component. The efficiency of a MAC typically relies on the speed of operation, power dissipation, and chip area along with the complexity level of the circuit. In this research paper, a power-delay-efficient signed-floating-point MAC (SFMAC) is proposed using Universal Compressor based Multiplier (UCM). Instead of having a complex design architecture, a simple multiplexer-based circuit is used to achieve a signed-floating output. The 8£8 SFMAC can take 8-bit mantissa and 3-bit exponent and therefore, the input to the SFMAC can be in the range of –(7.96875)10 to +(7.96875)10. The design and implementation of the proposed architecture is executed on the Cadence Spectre tool in GPDK 90 nm and TSMC 130 nm CMOS, which proves as power and delay efficient.

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Authors and Affiliations

R. Sarma
C. Bhargava
S. Jain

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