The paper brings forward an idea of multi-threaded computation synchronization based on the shared semaphored cache in the multi-core CPUs. It is dedicated to the implementation of multi-core PLC control, embedded solution or parallel computation of models described using hardware description languages. The shared semaphored cache is implemented as guarded memory cells within a dedicated section of the cache memory that is shared by multiple cores. This enables the cores to speed up the data exchange and seamlessly synchronize the computation. The idea has been verified by creating a multi-core system model using Verilog HDL. The simulation of task synchronization methods allows for proving the benefits of shared semaphored memory cells over standard synchronization methods. The proposed idea enhances the computation in the algorithms that consist of relatively short tasks that can be processed in parallel and requires fast synchronization mechanisms to avoid data race conditions.

The advent of language implementation tools such as PyPy and Truffle/Graal have reinvigorated and broadened interest in topics related to automatic compiler generation and optimization. Given this broader interest, we revisit the Futamura Projections using a novel diagram scheme. Through these diagrams we emphasize the recurring patterns in the Futamura Projections while addressing their complexity and abstract nature. We anticipate that this approach will improve the accessibility of the Futamura Projections and help foster analysis of those new tools through the lens of partial evaluation.

The issue of the morphemic analysis of medical terminology is a crucial factor in terms of translation strategies and compilation of a terminological dictionary. The research was conducted in the context of author’s current lexicographical work called as English-Ukrainian-Russian defining dictionary of dental terms. To provide the user of the dictionary with reliable techniques to construct the meaning of terms, morphemes relative frequency in the area of dentistry have been determined.

Design and operation of a compiler and virtual machine, being the essential components of a multiplatform control programming environment, are presented. The compiler translates source programs written in Structured Text language of the IEC 61131-3 standard into executable code in a dedicated intermediate language. The virtual machine, i.e. a specially designed processor implemented in software, is a runtime part of the environment executing the code in real time. Due to memory-to-memory operation principle the machine is able to process various data types defined in the standard. The focus is given on overloading and extensibility of the functions, as well as on uniform invocations of Program Organization Units. By selection of addressing mode, the environment can be deployed on multiple hardware platforms, beginning from 8-bit microcontrollers up to 32/64-bit industrial PCs. Industrial applications are indicated.