Details

Title

Low Power and Improved Speed Montgomery Multiplier using Universal Building Blocks

Journal title

International Journal of Electronics and Telecommunications

Yearbook

2019

Volume

vol. 65

Numer

No 3

Authors

Keywords

FPGA ; Model Sim ; Power dissipation ; speed ; Universal Logic

Divisions of PAS

Nauki Techniczne

Coverage

477-483

Publisher

Polish Academy of Sciences Committee of Electronics and Telecommunications

Date

2019.09.06

Type

Artykuły / Articles

Identifier

ISSN 2081-8491 (until 2012) ; eISSN 2300-1933 (since 2013)

DOI

10.24425/ijet.2019.129802

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