Details
Title
Two Optimization Ways of DDR3 Transmission Line Equal-Length Wiring Based on Signal IntegrityJournal title
International Journal of Electronics and TelecommunicationsYearbook
2021Volume
vol. 67Issue
No 3Authors
Affiliation
Cheng, Kaixing : Artificial Intelligence Key Laboratory of Sichuan Province, Sichuan University of Science and Engineering, Yibin, China ; Luo, Zhongqiang : Artificial Intelligence Key Laboratory of Sichuan Province, Sichuan University of Science and Engineering, Yibin, China ; Xiong, Xingzhong : Artificial Intelligence Key Laboratory of Sichuan Province, Sichuan University of Science and Engineering, Yibin, China ; Wei, Xiaohan : Artificial Intelligence Key Laboratory of Sichuan Province, Sichuan University of Science and Engineering, Yibin, ChinaKeywords
high-speed PCB ; signal integrity ; equal-length wiring ; HyperLynxDivisions of PAS
Nauki TechniczneCoverage
385-394Publisher
Polish Academy of Sciences Committee of Electronics and TelecommunicationsBibliography
[1] Gong Yonglin. The hot spots of printed circuit technology in 2020. Printed Circuit Information, 28(2):1–11, 2020.[2] Myeonghoon Oh, Youngwoo Kim, Hag Young Kim, Young Kyun Kim, and Jinsung Kim. Wire optimization and delay reduction for highperformance on-chip interconnection in gals systems. Etri Journal, 39(4):582–591, 2017.
[3] YuanWei-Qun, Song Jian-Yuan, Chen Shi-Rong, Suntak Technology Co, and LTD. Research and optimization design of high-speed pcb based on signal integrity. Journal of Guangdong University of Technology, 36(6):74–79, 2019.
[4] L.W.; Zhao Z.L. Yang, C.Z.; De. Research on signal integrity in high speed digital pcb board design. Automation and Instrumentation, (9):1– 4, 2018.
[5] YuanWei-Qun, Song Jian-Yuan, Chen Shi-Rong, Suntak Technology Co, and LTD. Research and optimization design of high-speed pcb based on signal integrity. Journal of Guangdong University of Technology, 36(6):74–79, 2019.
[6] Zhang Min. Signal integrity and design optimization of high speed parallel bus interface. Wireless Internet Technology, 15(6):3–4, 2019.
[7] Nastaran Soleimani, Mohammad G H Alijani, and Mohammad Hassan Neshati. Crosstalk analysis of multi-microstrip coupled lines using transmission line modeling. International Journal of Rf and Microwave Computer-aided Engineering, 29(6), 2019.
[8] Y.; Wen C.L. Yong, J.H.; Ting. PADS software foundation and application examples. Publishing House of Electronics Industry, 2019.
[9] Teng Li. A study on si simulation of high-speed interconnection channel. Electronics and Packaging, 18(12):37–40, 2018.
[10] H. Sasaki, M. Kanazawa, T. Sudo, A. Tomishima, and T. Kaneko. New frequency dependent target impedance for ddr3 memory system. pages 1–4, 2011.
[11] C. Liao, B. Mutnury, C. Chen, and Y. Lee. Pcb stack-up design and optimization for next generation speeds. In 2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS), pages 155–158, 2016.
[12] Nastaran Soleimani, Mohammad GH Alijani, and Mohammad H Neshati. Crosstalk analysis at near-end and far-end of the coupled transmission lines based on eigenvector decomposition. AEU-International Journal of Electronics and Communications, 112:152944, 2019.
[13] X. Ye and C. Ye. Transmission lines and basic signal integrity. In 2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI PI), pages 1–51, 2018.
[14] Wang Xiaojing, Ye Ming, and Ma Yan. Research crosstalk between parallel interconnects. Electronic Measurement Technology, 2015.
[15] J. Fan, X. Ye, J. Kim, B. Archambeault, and A. Orlandi. Signal integrity design for high-speed digital circuits: Progress and directions. IEEE Transactions on Electromagnetic Compatibility, 52(2):392–400, 2010.
[16] Dong Zhang, L. I. Qiong, and Qianqin Qin. Application of simulation analysis based on ibis model to sdram pcb design. Journal of Wuhan University, 2011.
[17] A. K. Pandey. Power-aware signal integrity analysis of ddr4 data bus in onboard memory module. In 2016 IEEE 20th Workshop on Signal and Power Integrity (SPI), pages 1–4, 2016.
[18] Nastaran Soleimani, Mohammad GH Alijani, and Mohammad H Neshati. Crosstalk analysis of multi-microstrip coupled lines using transmission line modeling. International Journal of RF and Microwave Computer-Aided Engineering, 29(6):e21677, 2019.
[19] S. M¨uller, T. Reuschel, R. Rimolo-Donadio, Y. H. Kwark, H. Br¨uns, and C. Schuster. Energy-aware signal integrity analysis for high-speed pcb links. IEEE Transactions on Electromagnetic Compatibility, 57(5):1226– 1234, 2015.
[20] Jie Tang, Yi Gong, and Zhen Guo Yang. Failure analysis on cracking of blind and buried vias of printed circuit board for high-end mobile phones. Soldering and Surface Mount Technology, 31(4), 2019.
[21] Liu Lu, Cao Yuesheng, and Duo Ruihua. Design and realization of high-density fdr interconnection switch board. Computer Engineering, (6):3, 2016.
[22] M S Al Salameh and M M Ababneh. Selecting printed circuit board parameters using swarm intelligence to minimize crosstalk between adjacent tracks. International Journal of Numerical Modelling-electronic Networks Devices and Fields, 28(1):21–32, 2015.